Ph.D. in Electrical Engineering, IIT Patna, Patna, India, 2019
MTech. in Very-Large-Scale Integration (VLSI) Design, GITAM University, Visakhapatnam, India, 2013
BTech. in Electronics and Communication Engineering, SISTAM College of Engineering, JNTU Kakinada, India, 2011
Postdoc research associate at university of Luxembourg from March 2021 to December 2023.
Assistant Professor, Electronics and Communication Engineering Department, KL Deemed to be University, Guntur, India, from August 2019 to November 2020.
Senior Design Engineer, Redpine Signals Inc., Hyderabad, India, 2019
VLSI for baseband wireless communication systems
VLSI architectures for satellite communication systems
VLSI architectural design
Field-programmable gate array (FPGA)-based system design
Digital Beamforming
ASIC Implementation
Recipient of Prime Minister Early Career Research Grant (PMECRG), 2026-2029.
Recipient of JRF-SRF during November 2013 - April 2017 at IIT Patna.
Recipient of SMDP C2SD Fellowship from May 2017 to February 2019 at IIT Patna.
Member of IEEE
IEEE Communication Society (ComSoc) Member.
IEEE Circuits and Systems Society Membership
V. Singh, S. Solanki, R. Palisetty, et al., "On the Performance of RIS-Aided Short Packet NOMA in Multiuser Land Mobile Satellite Networks with Discrete Phase Shift and Blocklength Design," IEEE Transactions on Aerospace and Electronic Systems, 2026, doi: 10.1109/TAES.2026.3673629.
V. Singh, S. Solanki, R. Palisetty, C. L. M. Rojas, J. A. V. Peralvo, J. C. M. Duncan, S. Chatzinotas, B. Ottersten, "STAR-RIS-Enhanced NOMA-Aided Overlay Multiuser Cognitive Satellite-Terrestrial Networks with Discrete Phase Shifts Design," IEEE Transactions on Aerospace and Electronic Systems, vol. 61, no. 5, pp. 15065-15076, Oct. 2025, doi: 10.1109/TAES.2025.3575055.
G. Eappen, J. L. G. Rios, V. Singh, R. Palisetty, et al., "Optimal Linear Precoding Under Realistic Satellite Communications Scenarios," IEEE Open Journal of Vehicular Technology, vol. 6, pp. 81-91, 2025, doi: 10.1109/OJVT.2024.3509646.
D. Barman, S. B. Santra, D. Chatterjee, R. Palisetty and P. Pillay, "Cogging Torque Computation in an Asymmetrical Interior Permanent Magnet Machine for Electric Vehicles," IEEE Journal of Emerging and Selected Topics in Industrial Electronics, vol. 6, no. 3, pp. 877-887, July 2025, doi: 10.1109/JESTIE.2024.3494594.
V. Singh, E. Geoffrey, A. M. Wallace, R. Palisetty, L. M. Rojas, J. L. G. Rios, J. A. Vásquez-Peralvo, J. Krivochiza, J. C. M. Duncan, L. G. Socarras, S. Chatzinotas and B. Ottersten, "Diversity Combining Scheme for Time-Varying STBC NGSO Multi-Satellite Systems," IEEE Communications Letters, 2024, doi: 10.1109/LCOMM.2024.3359329.
V. Singh, S. Solanki, G. Eappen, R. Palisetty, T. X. Vu and J. C. Merlano-Duncan, "On the Performance of Cache-Free/Cache-Aided STBC-NOMA in Cognitive Hybrid Satellite-Terrestrial Networks," IEEE Wireless Communications Letters, vol. 11, no. 12, pp. 2655-2659, Dec. 2022, doi: 10.1109/LWC.2022.3213367.
R. Palisetty, A. K. Panda and K. C. Ray, "ASIC Implementation of Low PAPR Multidevice Variable-Rate Architecture for IEEE 802.11ah," IEEE Transactions on Instrumentation and Measurement, vol. 70, pp. 1-10, 2021, Art. no. 2002810, doi: 10.1109/TIM.2020.3045809.
A. K. Panda, R. Palisetty and K. C. Ray, "High-Speed Area-Efficient VLSI Architecture of Three-Operand Binary Adder," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 11, pp. 3944-3953, Nov. 2020, doi: 10.1109/TCSI.2020.3016275.
R. Palisetty and K. C. Ray, "Multi User Variable Rate GO-OFDMA Architecture and its FPGA Prototype," IEEE Systems Journal, vol. 14, no. 2, pp. 2455-2463, June 2020, doi: 10.1109/JSYST.2019.2931942.
A. Agarwal, V. K. Sinha, R. Palisetty, P. Kumar, K. C. Ray, K. Kumar and T. Pandey, "Performance Analysis and FPGA Prototype of Variable Rate GO-OFDMA Baseband Transmission Scheme," Wireless Personal Communications, Springer, vol. 108, no. 2, pp. 785-809, September 2019.
R. Palisetty and K. C. Ray, "Oversampled CI-OFDM Baseband Transceiver Architecture and its FPGA Prototype," IETE Journal of Research, Taylor & Francis, 68:2, pp. 1023-1033, July 2019, doi: 10.1080/03772063.2019.1634493.
R. Palisetty and K. C. Ray, "FPGA Prototype and Real Time Analysis of Multiuser Variable Rate CI-GO-OFDMA," IEEE Transactions on Instrumentation and Measurement, vol. 67, no. 3, pp. 538-546, March 2018, doi: 10.1109/TIM.2017.2783078.
Querol, J., Kumar, S., Kodheli, O., Astro, A., Duncan, J., Gholamian, M., R. Palisetty, Chatzinotas, S., Heyn, T., Casati, G., & Zhao, B., “Non-terrestrial network testbeds for 5G and beyond,” 2022. DOI: 10.1049/PBTE105E_ch16.
Delivered a research talk on “FPGA and Verilog HDL for Rapid Hardware Development” as part of the Faculty Development Program on FPGA-based Communication System Design 2026, organized by NIT Jamshedpur, on 26 May 2026.
Delivered a research talk on “Partial Dynamic Reconfiguration on FPGAs using DFX: Hands-on Demo” as part of the Faculty Development Program on FPGA-based Communication System Design 2026, organized by NIT Jamshedpur, on 28 May 2026.
Delivered an online talk on “VLSI Architecture for Communication: Rapid Prototyping for Next-Generation Communication” as part of the ATAL Faculty Development Programme (FDP), organized by BITS Pilani, Hyderabad Campus, in January 2025.
Delivered a research talk on “VLSI Architecture and Rapid Prototyping for Next-Generation Communication” as part of the AICTE-ATAL Faculty Development Program (FDP), organized by NIST University, Berhampur, Odisha, on 11 July 2025.
Delivered an invited talk on “FPGA System Design” at the Post Graduate Department of Electronic Science, Berhampur University, Odisha, on 10 January 2023.
L. M. Garcés-Socarrás, J. L. González-Rios, R. Palisetty, et al., “Efficient Digital Beamforming for Satellite Payloads Using a 2D FFT-Based Parallel Architecture,” 2025 IEEE International Symposium on Circuits and Systems (ISCAS), London, United Kingdom, 2025, pp. 1–5. DOI: 10.1109/ISCAS56072.2025.11043196.
J. A. Vásquez-Peralvo, J. C. M. Duncan, V. N. Ha, R. Palisetty, and S. Chatzinotas, “Planar Sparse Arrays Using Triangular Lattice Transformations,” 2024 International Symposium on Antennas and Propagation (ISAP), Incheon, Republic of Korea, 2024, pp. 1–2. DOI: 10.1109/ISAP62502.2024.10846429.
J. A. Vásquez-Peralvo, J. M. Duncan, V. N. Ha, R. Palisetty, et al., “Quantization Effects of Twiddle Factors in FFT for Beamforming Using Planar Arrays,” 2024 IEEE International Symposium on Phased Array Systems and Technology (ARRAY), Boston, MA, USA, 2024, pp. 1–7. DOI: 10.1109/ARRAY58370.2024.10880319.
V. N. Ha, D. H. Nguyen, J. C. M. Duncan, J. L. González-Rios, J. A. Vásquez-Peralvo, G. Eappen, L. M. Garcés-Socarrás, R. Palisetty, S. Chatzinotas, and B. Ottersten, “User-Centric Beam Selection and Precoding Design for Coordinated Multiple-Satellite Systems,” 2024 IEEE 35th International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC), Valencia, Spain, 2024, pp. 1–6. DOI: 10.1109/PIMRC59610.2024.10817273.
J. L. González-Rios, L. Martínez-Marrero, E. Lagunas, J. Krivochiza, L. M. Garcés-Socarrás, R. Palisetty, J. M. Duncan, and S. Chatzinotas, “Doppler Shift in Precoded Cooperative Multi-Gateway Satellite Systems: Effects and Mitigation,” 2024 IEEE Wireless Communications and Networking Conference (WCNC), Dubai, UAE, 2024, pp. 1–6. DOI: 10.1109/WCNC57260.2024.10570931.
C. L. Marcos Rojas, R. Palisetty, J. Krivochiza, J. L. González-Rios, L. Martínez-Marrero, W. A. Martins, J. C. Merlano Duncan, and S. Chatzinotas, “Time-Misalignment Estimation in Overlapped DVB-S2X Waveforms,” 2024 IEEE Wireless Communications and Networking Conference (WCNC), Dubai, UAE, 2024, pp. 1–6. DOI: 10.1109/WCNC57260.2024.10570646.
R. Palisetty, et al., “FPGA Implementation of Efficient Beamformer for On-Board Processing in MEO Satellites,” 2023 IEEE 34th Annual International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC), Toronto, Canada, 2023, pp. 1–7. DOI: 10.1109/PIMRC56721.2023.10294011.
R. Palisetty, et al., “FPGA Implementation of Efficient 2D-FFT Beamforming for On-Board Processing in Satellites,” 2023 IEEE 98th Vehicular Technology Conference (VTC2023-Fall), Hong Kong, 2023, pp. 1–7. DOI: 10.1109/VTC2023-Fall60731.2023.10333351.
J. C. M. Duncan, V. N. Ha, J. Krivochiza, R. Palisetty, et al., “Harnessing the Power of Swarm Satellite Networks with Wideband Distributed Beamforming,” 2023 IEEE 34th Annual International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC), Toronto, Canada, 2023, pp. 1–6. DOI: 10.1109/PIMRC56721.2023.10294061.
J. A. Vásquez-Peralvo, J. C. M. Duncan, R. Palisetty, V. Singh, G. Eappen, and J. L. González-Rios, “Wide-Beamwidth Circular Polarized Antenna for Diversity Combining Applications,” 2022 IEEE Globecom Workshops (GC Wkshps), Rio de Janeiro, Brazil, 2022, pp. 1395–1399. DOI: 10.1109/GCWkshps56602.2022.10008759.
V. N. Ha, Z. Abdullah, G. Eappen, J. C. M. Duncan, R. Palisetty, J. L. González-Rios, et al., “Joint Linear Precoding and DFT Beamforming Design for Massive MIMO Satellite Communication,” 2022 IEEE Globecom Workshops (GC Wkshps), Rio de Janeiro, Brazil, 2022, pp. 1121–1126. DOI: 10.1109/GCWkshps56602.2022.10008605.
R. Palisetty, et al., “Area-Power Analysis of FFT-Based Digital Beamforming for GEO, MEO, and LEO Scenarios,” 2022 IEEE 95th Vehicular Technology Conference (VTC2022-Spring), Helsinki, Finland, 2022, pp. 1–5. DOI: 10.1109/VTC2022-Spring54318.2022.9861037.
A. K. Panda, R. Palisetty, and K. C. Ray, “Area-Efficient Parallel-Prefix Binary Comparator,” IEEE International Symposium on Smart Electronic Systems (iSES), Rourkela, India, 2019, pp. 12–16. DOI: 10.1109/iSES47678.2019.00016.
R. Palisetty, A. K. Panda, and K. C. Ray, “Secure OFDM Based on Coupled Linear Congruential Generator and Its FPGA Prototype,” IEEE International Conference on Information Communication and Signal Processing (ICICSP), NTU, Singapore, 2018, pp. 54–58. DOI: 10.1109/ICICSP.2018.8549826.
R. Palisetty and K. C. Ray, “Fixed-Point Design of 1024-Point CI-OFDM for DVB-Satellite to Handheld,” in Advances in Communication, Devices and Networking, Lecture Notes in Electrical Engineering, vol. 462, Springer, 2018, pp. 485–493. DOI: 10.1007/978-981-10-7901-6_53.
R. Palisetty, V. K. Sinha, S. Mallick, and K. C. Ray, “FPGA Prototyping of Energy Dispersal and Improved Error Efficiency Techniques for DVB-Satellite Standard,” IEEE International Conference on VLSI Systems, Architecture, Technology and Applications, Bangalore, India, 2015, pp. 1–5.
Research Project
Project Title: Hardware Prototype and ASIC Implementation of Efficient Digital Beamformer for Onboard Processing in Satellites
Funding Agency: Anusandhan National Research Foundation (ANRF), Government of India
Scheme: PMECRG (Early Career Research Grant)
Role: Principal Investigator (PI)
Duration: 36 Months (2026–2029)
Grant Amount: ₹47,59,290
Reference: ANRF/ECRG/2025/001554/ENS
IEEE Transactions on Circuits and Systems-I
IEEE Transactions on Communications
IEEE Transactions on Reliability
IEEE Transactions on Circuits and Systems-II
EURASIP Journal on Advances in Signal Processing
IEEE Internet of Things Journal
Taylor & Francis: International Journal of Electronics
